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  rev.1.00, oct.14. 2003, page 1 of 10 h7n0603dl, H7N0603DS silicon n channel mos fet high speed power switching rej03g0123-0100z rev.1.00 oct.14.2003 features ? low on - resistance r ds (on) = 11 m ? typ. ? low drive current ? capable of 4.5 gate drive outline 1. gate 2. drain 3. source 4. drain h7n0603dl dpak-2 1 2 3 4 dpak-s H7N0603DS 4 1 2 3 d g s
h7n0603dl, h7l0603ds rev.1.00, oct.14. 2003, page 2 of 10 absolute maximum ratings (ta = 25 c) item symbol ratings unit drain to source voltage v dss 60 v gate to source voltage v gss 20 v drain current i d 30 a drain peak current i d (pulse) note1 120 a body drain diode reverse drain current i dr 30 a avalanche current i ap note3 25 a avalanche energy e ar note3 53.6 mj channel dissipation pch note2 40 w channel temperature tch 150 c storage temperature tstg ?55 to +150 c notes: 1. pw 10 s, duty cycle 1% 2. tc = 25 c 3. tch = 25 c, rg 50 ?
h7n0603dl, h7l0603ds rev.1.00, oct.14. 2003, page 3 of 10 electrical characteristics (ta = 25 c) item symbol min typ max unit test condition drain to source breakdown voltage v (br)dss 60??v i d = 10 ma, v gs = 0 gate to source breakdown voltage v (br)gss 20??v i g = 100 a, v ds = 0 gate to source leak current i gss ?? 10 av gs = 16 v, v ds = 0 zero gate voltage drain current i dss ??10 av ds = 60 v, v gs = 0 gate to source cutoff voltage v gs(off) 1.5 ? 2.5 v i d = 1 ma, v ds = 10 v ? 1115m ? i d = 15 a, v gs = 10 v note1 static drain to source on state resistance r ds(on) ? 1622m ? i d = 15 a, v gs = 4.5 v note1 forward transfer capacitance |y fs |2440?s i d = 15 a, v ds = 10 v note1 input capacitance ciss ? 3200 ? pf output capacitance coss ? 385 ? pf reverse transfer capacitance crss ? 225 ? pf v ds = 10 v v gs = 0 f = 1 mhz total gate charge qg ? 56 ? nc gate to source charge qgs ? 11 ? nc gate to drain charge qgd ? 12 ? nc v dd = 25 v v gs = 10 v i d = 30 a turn-on delay time t d(on) ?30?ns rise time t r ? 125 ? ns turn-off delay time t d(off) ?90?ns fall time t f ?17?ns v gs = 10 v, i d = 15 a r l = 2.0 ? rg = 4.7 ? body - drain diode forward voltage v df ?0.9?v i f = 30 a, v gs = 0 note1 body ? drain diode reverse recovery time t rr ?30?nsi f = 30 a, v gs = 0 dif / dt = 100 a / s notes: 1. pulse test
h7n0603dl, h7l0603ds rev.1.00, oct.14. 2003, page 4 of 10 main characteristics channel dissipation pch (w) case temperature tc ( c) power vs. tmperature derating drain to source voltage v (v) ds drain current i d (a) maximum safe operation area gate to source voltage v gs (v) typical trasfer characteristics drain current i d (a) drain current i d (a) drain to source voltage v ds (v) typical output characterristics 50 40 30 20 0 50 100 150 200 50 40 30 20 10 0 246810 3.5 v 2.5 v 10 5.0 v 4.5 v 3 v 50 40 30 20 10 0 2468 10 150 c 25 c tc=?40 c v ds = 10 v pulse test pulse test v gs = 10 v 4.0 v 0.1 0.3 1 3 10 30 100 1000 300 100 30 10 3 1 0.1 0.03 0.01 0.3 ta = 25 c 10 s 100 s 1 ms pw = 10 ms (1 shot) dc operation (tc = 25?c) operation in this area is limited by r ds(on)
h7n0603dl, h7l0603ds rev.1.00, oct.14. 2003, page 5 of 10 0 48 12 16 20 500 400 300 200 100 pulse test i d = 20 a 10 a 5 a 13010 0 3 100 1 10 10 3 30 v gs = 4.5 v 10 v pulse test 0.0001 1 0.1 0.01 0.001 10 10 0.1 0.01 0.001 100 1 drain current i d (a) drain source on state resistance r ds(on) (m ? ) static drain to source state resistance vs. drain current case tem p erature tc ( ?c ) drain source on state resistance r ds(on) (m ? ) static drain to state resistance vs. temperature drain current i d (a) forward transfer admittance vs. drain current forward transfer admittance |yfs| (s) gate to source voltage v gs (v) drain source saturation voltage vs. gate to source voltage drain to source voltage v ds(on) (mv) 50 40 30 20 10 ?50 0 50 100 150 0 v gs = 10 v 4.5 v pulse test 5, 10, 20 a 5, 10, 20 a 100 tc = ?40 c 150 c 25 c v ds = 10 v pulse test
h7n0603dl, h7l0603ds rev.1.00, oct.14. 2003, page 6 of 10 1 0.1 0.3 3 10 30 100 01020304050 100 1000 300 100 80 60 40 20 0 20 16 12 8 4 20 40 60 80 100 0 1000 100 300 30 10 1 3 0.1 0.3 3 10 100 1000 100 300 30 3 10 1 30 30 1 10 v gs = 0 f = 1 mhz ciss coss crss i d = 30 a v gs v ds v gs = 10 v, v dd = 30 v pw = 5 s, duty < 1 % rg = 4.7 ? t r t r t d(on) t d(off) t f t f 3000 10000 reverse drain current i dr (a) reverse recovery time trr (ns) body-drain diode reverse recovery time capacitance c (pf) drain to source voltage v ds (v) typical capacitance vs. drain to source voltage reverse drain current qg (nc) drain to source voltage v ds (v) gate source voltage v gs (v) dynamic input characteristics switching time t (ns) drain current i d (a) switching characteristics di / dt = 100 a / s v gs = 0, ta = 25 c v dd = 50 v 25 v 10 v v dd = 50 v 25 v 10 v
h7n0603dl, h7l0603ds rev.1.00, oct.14. 2003, page 7 of 10 0 0.4 0.8 1.2 1.6 2.0 pulse test v gs = 0, ?5 v 10 v 5 v 50 40 30 20 10 d. u. t rg i monitor ap v monitor ds v dd 50 ? vin 15 v 0 i d v ds i ap v (br)dss l v dd e =  l  i  2 1 v v ? v ar ap dss dss dd 2 80 64 48 32 16 25 50 75 100 125 150 0 i ap = 30 a v dd = 25 v duty < 0.1 % rg > 50 ? source to drain voltage v sd (v) reverse drain current i dr (a) reverse drain current vs. source to drain voltage channel temperature tch ( c) repetitive avalanche energy e ar (mj) maximum avalanche energy vs. channel temperature derating avalanche test circuit avalanche waveform
h7n0603dl, h7l0603ds rev.1.00, oct.14. 2003, page 8 of 10 tr td(on) vin 90% 90% 10% 10% vout td(off) 90% 10% t f switching time test circuit switching time waveform pulse width pw (s) normalized transient thermal impedance s (t) normalized transient thermal impedance vs. pulse width 3 1 0.3 0.1 0.03 0.01 10 100 1 m 10 m 100 m 1 10 vin monitor d.u.t. vin 10 v r l v = 30 v ds vout monitor rg tc = 25 c d = 1 0.5 0.05 0.2 0.1 0.01 1shot 0.02 dm p pw t d = pw t ch - c(t) = s (t) ? ch - c ch - c = 3.125 c/ w, tc = 25 c
h7n0603dl, h7l0603ds rev.1.00, oct.14. 2003, page 9 of 10 package dimensions ? h7n0603dl package code jedec jeita mass (reference value) dpak (l)-(2) ? ? 0.42 g 6.5 0.5 2.3 0.2 0.55 0.1 1.2 0.3 0.55 0.1 5.5 0.5 1.7 0.5 16.2 0.5 4.7 0.5 5.4 0.5 1.15 0.1 2.29 0.5 2.29 0.5 0.8 0.1 0.55 0.1 3.1 0.5 (0.7) as of january, 2003 unit: mm
h7n0603dl, h7l0603ds rev.1.00, oct.14. 2003, page 10 of 10 ? H7N0603DS package code jedec jeita mass (reference value) dpak (s) ? conforms 0.28 g as of january, 2003 unit: mm 6.5 0.5 5.4 0.5 2.3 0.2 0.55 0.1 0 ? 0.25 0.55 0.1 1.5 0.5 5.5 0.5 2.5 0.5 (1.2) 0.8 0.1 2.29 0.5 2.29 0.5 1.2 max (5.1) (5.1) 1.0 max. (0.1) (0.1)
? 2003. renesas technolo gy corp., all ri g hts reserved. printed in japan . colo p hon 1.0 keep safet y first in y our circuit desi g ns ! 1. renesas technolo gy corp. puts the maximum effort into makin g semiconductor products better and more reliable, but there is alwa y s the possibilit y that trouble m a y occur with them. trouble with semiconductors ma y lead to personal in j ur y , fire or propert y dama g e . remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placem ent of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas t echnology corp. or a third party. 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i nformation on products at the time of publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvement s or other reasons. it is therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distrib utor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. please also pay attention to information published by renesas technology corp. by various means, including the renesas tech nology corp. semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, a nd algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under ci rcumstances in which human life is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp ace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technolo gy corp. is necessar y to reprint or reproduce in whole or in part these materials . 7 . if these products or technolo g ies are sub j ect to the japanese export control restrictions, the y must be exported under a license from the japanese g overnment and cannot b e imported into a countr y other than the approved destination. an y diversion or reexport contrar y to the export control laws and re g ulatio n s of japan and/or the countr y of destination is prohibited . 8. please contact renesas technolo gy corp. for further details on these materials or the products contained therein . s ales strate g ic plannin g div. nippon bld g ., 2-6-2, ohte-machi, chi y oda-ku, tok y o 100-0004, japa n htt p ://www.renesas.co m renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500 fax: <1> (408) 382-7501 renesas technology europe limited. dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, united kingdom tel: <44> (1628) 585 100, fax: <44> (1628) 585 900 renesas technology europe gmbh dornacher str. 3, d-85622 feldkirchen, germany tel: <49> (89) 380 70 0, fax: <49> (89) 929 30 11 renesas technology hong kong ltd. 7/f., north tower, world finance centre, harbour city, canton road, hong kong tel: <852> 2265-6688, fax: <852> 2375-6836 renesas technology taiwan co., ltd. fl 10, #99, fu-hsing n. rd., taipei, taiwan tel: <886> (2) 2715-2888, fax: <886> (2) 2713-2999 renesas technology (shanghai) co., ltd. 26/f., ruijin building, no.205 maoming road (s), shanghai 200020, china tel: <86> (21) 6472-1001, fax: <86> (21) 6415-2952 renesas technology singapore pte. ltd. 1, harbour front avenue, #06-10, keppel bay tower, singapore 098632 tel: <65> 6213-0200, fax: <65> 6278-8001 renesas sales offices


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